Wideband Trans-Impedance Amplifier
November 2025
Designed a multi-stage wideband transimpedance amplifier in 45nm CMOS using Cadence, achieving:
- 507 kΩ transimpedance gain
- 359 MHz bandwidth
- 120.9 nA rms input-referred noise
All specs met or exceeded on a 1V supply.
Architecture
A 4-stage pipeline: common-gate input stage, differential pair, cascaded common-source amplifiers, and a common-drain output buffer. The stack was architected to simultaneously satisfy three competing constraints: low input impedance (to absorb photodiode current without loading it), high overall gain, and a 600Ω differential load drive requirement — the kind of tradeoff where fixing one stage’s spec tends to break another’s.
Notes
Add schematics, gain/phase plots, or noise simulation screenshots here once exported from Cadence.